Renesas Electronics /R7FA6M1AD /POEG /POEGGA

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Interpret as POEGGA

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (0)PIDF 0 (0)IOCF 0 (0)OSTPF 0 (0)SSF 0 (0)PIDE 0 (0)IOCE 0 (0)OSTPE 0 (0)CDRE0 0 (0)CDRE1 0 (0)CDRE2 0 (0)CDRE3 0 (0)CDRE4 0 (0)CDRE5 0 (0)ST 0 (0)INV 0 (0)NFEN 0 (00)NFCS

OSTPF=0, ST=0, INV=0, PIDE=0, PIDF=0, CDRE1=0, CDRE3=0, CDRE0=0, IOCE=0, SSF=0, IOCF=0, CDRE2=0, CDRE4=0, OSTPE=0, CDRE5=0, NFEN=0, NFCS=00

Description

POEG Group A Setting Register

Fields

PIDF

Port Input Detection Flag

0 (0): A output-disable request from the GTETRG pin has not been generated.

1 (1): A output-disable request from the GTETRG pin has been generated.

IOCF

Real Time Overcurrent Detection Flag

0 (0): A output-disable request from GPT disable request or comparator interrupt has not been generated.

1 (1): A output-disable request from GPT disable request or comparator interrupt has been generated.

OSTPF

Oscillation Stop Detection Flag

0 (0): A output-disable request from the oscillation stop detection has not been generated.

1 (1): A output-disable request from the oscillation stop detection has been generated.

SSF

Software Stop Flag

0 (0): A output-disable request from software has not been generated.

1 (1): A output-disable request from software has been generated.

PIDE

Port Input Detection EnableNote: Can be modified only once after a reset.

0 (0): A output-disable request from the GTETRG pins disabled.

1 (1): A output-disable request from the GTETRG pins enabled.

IOCE

Enable for GPT Output-Disable RequestNote: Can be modified only once after a reset.

0 (0): Disable output-disable requests from GPT disable request

1 (1): Enable output-disable requests from GPT disable request

OSTPE

Oscillation Stop Detection EnableNote: Can be modified only once after a reset.

0 (0): A output-disable request from the oscillation stop detection disabled.

1 (1): A output-disable request from the oscillation stop detection enabled.

CDRE0

Comparator Disable Request Enable 0Note: Can be modified only once after a reset.

0 (0): A disable request of comparator 0 disabled.

1 (1): A disable request of comparator 0 enabled.

CDRE1

Comparator Disable Request Enable 1Note: Can be modified only once after a reset.

0 (0): A disable request of comparator 1 disabled.

1 (1): A disable request of comparator 1 enabled.

CDRE2

Comparator Disable Request Enable 2Note: Can be modified only once after a reset.

0 (0): A disable request of comparator 2 disabled.

1 (1): A disable request of comparator 2 enabled.

CDRE3

Comparator Disable Request Enable 3Note: Can be modified only once after a reset.

0 (0): A disable request of comparator 3 disabled.

1 (1): A disable request of comparator 3 enabled.

CDRE4

Comparator Disable Request Enable 4Note: Can be modified only once after a reset.

0 (0): A disable request of comparator 4 disabled.

1 (1): A disable request of comparator 4 enabled.

CDRE5

Comparator Disable Request Enable 5Note: Can be modified only once after a reset.

0 (0): A disable request of comparator 5 disabled.

1 (1): A disable request of comparator 5 enabled.

ST

GTETRG Input Status Flag

0 (0): GTETRG input after filtering is 0.

1 (1): GTETRG input after filtering is 1.

INV

GTETRG Input Reverse

0 (0): GTETRG Input

1 (1): GTETRG Input Reversed.

NFEN

Noise Filter Enable

0 (0): Filtering noise disabled

1 (1): Filtering noise enabled

NFCS

Noise Filter Clock Select

0 (00): Sampling GTETRG pin input level for three times in every PCLKB.

1 (01): Sampling GTETRG pin input level for three times in every PCLKB /8.

2 (10): Sampling GTETRG pin input level for three times in every PCLKB /32.

3 (11): Sampling GTETRG pin input level for three times in every PCLKB /128.

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